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Jun Tanabe
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2020 – today
- 2023
- [c9]Jun Tanabe, Ibrahim Khan, Thai Van Nguyen, Chollakorn Nimpattanavong, Ruck Thawonmas:
Adaptive Background Music According to the Player's Arousal for DareFightingICE. IAIT 2023: 34:1-34:6 - [c8]Ryosuke Hasegawa, Ruck Thawonmas, Jun Tanabe, Lian Yu:
Minecraft Video Aesthetics Quality Assessment Model. IAIT 2023: 35:1-35:5 - 2020
- [j4]Yutaka Yamada, Masato Uchiyama, Masashi Jobashi, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Yoshinari Ojima, Ryusuke Murakami, Takashi Yoshikawa, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda:
A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications. IEEE J. Solid State Circuits 55(1): 120-132 (2020)
2010 – 2019
- 2019
- [c7]Yutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa:
A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications. ISSCC 2019: 132-134 - 2015
- [c6]Jun Tanabe, Toru Sano, Yutaka Yamada, Tomoki Watanabe, Mayu Okumura, Manabu Nishiyama, Tadakazu Nomura, Kazushige Oma, Nobuhiro Sato, Moriyasu Banno, Hiroo Hayashi, Takashi Miyamori:
18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications. ISSCC 2015: 1-3 - 2014
- [j3]Takashi Miyamori, Hui Xu, Hiroyuki Usui, Soichiro Hosoda, Toru Sano, Kazumasa Yamamoto, Takeshi Kodaka, Nobuhiro Nonogaki, Nau Ozaki, Jun Tanabe:
Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters. IEICE Trans. Electron. 97-C(4): 360-368 (2014) - [c5]Hiroyuki Usui, Jun Tanabe, Toru Sano, Hui Xu, Takashi Miyamori:
An evaluation of an energy efficient many-core SoC with parallelized face detection. ASP-DAC 2014: 311-316 - 2013
- [c4]Takashi Miyamori, Hui Xu, Takeshi Kodaka, Hiroyuki Usui, Toru Sano, Jun Tanabe:
Development of low power many-core SoC for multimedia applications. DATE 2013: 773-777 - [c3]Takeshi Kodaka, Akira Takeda, Shunsuke Sasaki, Akira Yokosawa, Toshiki Kizu, Takahiro Tokuyoshi, Hui Xu, Toru Sano, Hiroyuki Usui, Jun Tanabe, Takashi Miyamori, Nobu Matsumoto:
A near-future prediction method for low power consumption on a many-core processor. DATE 2013: 1058-1059 - 2012
- [c2]Hui Xu, Jun Tanabe, Hiroyuki Usui, Soichiro Hosoda, Toru Sano, Kazumasa Yamamoto, Takeshi Kodaka, Nobuhiro Nonogaki, Nau Ozaki, Takashi Miyamori:
A low power many-core SoC with two 32-core clusters connected by tree based NoC for multimedia applications. VLSIC 2012: 150-151
2000 – 2009
- 2009
- [j2]Akito Higatani, Toshihiko Kitazawa, Jun Tanabe, Yoshiki Suga, Ravi Sekhar, Yasuo Asakura:
Empirical Analysis of Travel Time Reliability Measures in Hanshin Expressway Network. J. Intell. Transp. Syst. 13(1): 28-38 (2009) - 2008
- [c1]Shuou Nomura, Fumihiko Tachibana, Tetsuya Fujita, Chen Kong Teh, Hiroyuki Usui, Fumiyuki Yamane, Yukimasa Miyamoto, Chaiyasit Kumtornkittikul, Hiroyuki Hara, Takahiro Yamashita, Jun Tanabe, Masaru Uchiyama, Yoshiro Tsuboi, Takashi Miyamori, Takeshi Kitahara, Hironori Sato, Y. Homma, Shuuji Matsumoto, Keiko Seki, Y. Watanabe, Mototsugu Hamada, Makoto Takahashi:
A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology. ISSCC 2008: 262-263 - 2005
- [j1]Takashi Miyamori, Jun Tanabe, Yasuhiro Taniguchi, Kenji Furukawa, Tatsuo Kozakaya, Hiroaki Nakai, Yukimasa Miyamoto, Ken-ichi Maeda, Masataka Matsui:
Development of Image Recognition Processor Based on Configurable Processor. J. Robotics Mechatronics 17(4): 437-446 (2005)
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