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John G. Eyles
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2010 – 2019
- 2013
- [j4]John W. Poulton, William J. Dally, Xi Chen, John G. Eyles, Thomas H. Greer, Stephen G. Tell, John M. Wilson, C. Thomas Gray:
A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications. IEEE J. Solid State Circuits 48(12): 3206-3218 (2013) - [c9]John W. Poulton, William J. Dally, Xi Chen, John G. Eyles, Thomas H. Greer, Stephen G. Tell, C. Thomas Gray:
A 0.54pJ/b 20Gb/s ground-referenced single-ended short-haul serial link in 28nm CMOS for advanced packaging applications. ISSCC 2013: 404-405 - 2010
- [j3]Brian S. Leibowitz, Robert Palmer, John Poulton, Yohan Frans, Simon Li, John M. Wilson, Michael Bucher, Andrew M. Fuller, John G. Eyles, Marko Aleksic, Trey Greer, Nhat Nguyen:
A 4.3 GB/s Mobile Memory Interface With Power-Efficient Bandwidth Scaling. IEEE J. Solid State Circuits 45(4): 889-898 (2010)
2000 – 2009
- 2007
- [j2]John Poulton, Robert Palmer, Andrew M. Fuller, Trey Greer, John G. Eyles, William J. Dally, Mark Horowitz:
A 14-mW 6.25-Gb/s Transceiver in 90-nm CMOS. IEEE J. Solid State Circuits 42(12): 2745-2757 (2007) - [c8]Robert Palmer, John Poulton, William J. Dally, John G. Eyles, Andrew M. Fuller, Trey Greer, Mark Horowitz, Mark Kellam, F. Quan, F. Zarkeshvari:
A 14mW 6.25Gb/s Transceiver in 90nm CMOS for Serial Chip-to-Chip Communications. ISSCC 2007: 440-614 - 2000
- [c7]Voicu Popescu, John G. Eyles, Anselmo Lastra, Joshua Steinhurst, Nick England, Lars S. Nyland:
The WarpEngine: an architecture for the post-polygonal age. SIGGRAPH 2000: 433-442
1990 – 1999
- 1997
- [c6]John G. Eyles, Steven Molnar, John Poulton, Trey Greer, Anselmo Lastra, Nick England, Lee Westover:
PixelFlow: The Realization. Workshop on Graphics Hardware 1997: 57-67 - 1992
- [j1]John Poulton, John G. Eyles, Steven E. Molnar, Henry Fuchs:
Breaking the frame-buffer bottleneck with logic-enhanced memories. IEEE Computer Graphics and Applications 12(6): 65-74 (1992) - [c5]Steven Molnar, John G. Eyles, John Poulton:
PixelFlow: high-speed rendering using image composition. SIGGRAPH 1992: 231-240
1980 – 1989
- 1989
- [c4]Henry Fuchs, John Poulton, John G. Eyles, Trey Greer, Jack Goldfeather, David A. Ellsworth, Steven Molnar, Greg Turk, Brice Tebbs, Laura Israel:
Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories. SIGGRAPH 1989: 79-88 - 1987
- [c3]John G. Eyles, John D. Austin, Henry Fuchs, Trey Greer, John Poulton:
Pixel-Planes 4: A Summary. Advances in Computer Graphics Hardware 1987: 183-207 - 1985
- [c2]Henry Fuchs, Jack Goldfeather, Jeff P. Hultquist, Susan Spach, John D. Austin, Frederick P. Brooks Jr., John G. Eyles, John Poulton:
Fast Spheres, Shadows, Textures, Transparencies, and Image Enhancements in Pixel-Planes. Advances in Computer Graphics 1985: 169-187 - [c1]Henry Fuchs, Jack Goldfeather, Jeff P. Hultquist, Susan Spach, John D. Austin, Frederick P. Brooks Jr., John G. Eyles, John Poulton:
Fast spheres, shadows, textures, transparencies, and imgage enhancements in pixel-planes. SIGGRAPH 1985: 111-120
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