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2020 – today
- 2024
[i1]Eero Lehtonen, Tuomo Komulainen, Ari Paasio, Mika Laiho:
Gradient events: improved acquisition of visual information in event cameras. CoRR abs/2409.01764 (2024)- 2020
- [c72]Mika Grönroos, Ari Paasio, Mika Laiho:
High-Dynamic-Range Image Reconstruction from Pixel-Level Self-Reset ADC Samples. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j22]Olli Lahdenoja, Tero Säntti, Jonne K. Poikonen, Mika Laiho
, Ari Paasio, Joonas Pekkarinen, Antti Salminen:
Embedded processing methods for online visual analysis of laser welding. J. Real Time Image Process. 16(4): 1099-1116 (2019) - 2018
- [j21]Mika Grönroos, Tapani Nevalainen, Ari Paasio:
Implementation of a Fast and Low-Power Thermopile Readout Circuit Arrangement for Array Processors. IEEE Trans. Circuits Syst. II Express Briefs 65-II(5): 537-541 (2018) - [c71]Tapani Nevalainen, Esteban Ferro, Víctor M. Brea, Paula López, Ari Paasio:
Low-Power Regulator for Micro Energy Harvesting Applications. NORCAS 2018: 1-5 - 2017
- [c70]Mika Grönroos, Ari Paasio:
A novel and systematic implementation of thermometer-coded current-mode DAC. ECCTD 2017: 1-4 - [c69]Mari Grönroos, Tapani Nevalainen, Jonne Poikonen, Ari Paasio:
Fast thermopile readout circuit arrangement for array processors. ISCAS 2017: 1-4 - [c68]Ari Paasio:
Local memory and logic arrangement for ultra-low power array processors. ISCAS 2017: 1-4 - 2016
- [c67]Ari Paasio:
Ultra low-power array processor propagation circuit arrangement. ISCAS 2016: 2515-2518 - 2015
- [c66]Ari Paasio:
Local asymmetric propagation stopper circuit for asynchronous binary wave computing. ISCAS 2015: 1334-1337 - [c65]Tero Säntti, Jonne K. Poikonen, Olli Lahdenoja, Mika Laiho, Ari Paasio:
Online seam tracking for laser welding with a vision chip and FPGA enabled camera system. ISCAS 2015: 1985-1988 - [c64]Mojtaba Jafari Tadi, Eero Lehtonen, Tero Koivisto, Mikko Pänkäälä, Ari Paasio, Mika Teräs:
Seismocardiography: Toward heart rate variability (HRV) estimation. MeMeA 2015: 261-266 - 2014
- [j20]Mojtaba Jafari Tadi, Tero Koivisto, Mikko Pänkäälä, Ari Paasio:
Accelerometer-Based Method for Extracting Respiratory and Cardiac Gating Information for Dual Gating during Nuclear Medicine Imaging. Int. J. Biomed. Imaging 2014: 690124:1-690124:11 (2014) - [c63]Olli Lahdenoja, Tero Säntti, Mika Laiho, Ari Paasio, Jonne K. Poikonen:
Seam tracking with adaptive image capture for fine-tuning of a high power laser welding process. ICMV 2014: 94451V - [c62]Mika Kutila, Ari Paasio, Teijo Lehtonen:
Simulations on 130 nm technology 6T SRAM cell for Near-Threshold operation. ISCAS 2014: 1211-1214 - [c61]Ari Paasio:
CheckerBoard binary CNN core. ISCAS 2014: 1584-1587 - [c60]Mika Kutila, Ari Paasio, Teijo Lehtonen:
Comparison of 130 nm technology 6T and 8T SRAM cell designs for Near-Threshold operation. MWSCAS 2014: 925-928 - 2013
- [c59]Olli Lahdenoja, Tero Säntti, Jonne Poikonen, Mika Laiho, Ari Paasio:
Characterizing Spatters in Laser Welding of Thick Steel Using Motion Flow Analysis. SCIA 2013: 675-686 - 2011
- [c58]Hao Meng, Ari Paasio, Jia Sun:
A capacitor mismatch insensitive technique for RSD cyclic ADC. ECCTD 2011: 504-507 - [c57]Ari Paasio:
Prototype rotation based assisted image analysis for 3D vision system. ISCAS 2011: 1101-1104 - [c56]Jia Sun, Hao Meng, Ari Paasio:
Design Techniques and Considerations for a 1.2V 10bit CMOS Pipeline ADC. UKSim 2011: 528-533 - 2010
- [c55]Lauri Koskinen, Jonne Poikonen, Mika Laiho, Ari Paasio:
Rate-distortion performance analysis of an analog motion estimation array. ICASSP 2010: 1530-1533
2000 – 2009
- 2009
- [j19]Jonne Poikonen, Mika Laiho, Ari Paasio, Lauri Koskinen, Kari Halonen:
An Analog Processor Array Implementing Interconnect-Efficient Reference Data Shift and SAD/SSD Extraction for Motion Estimation. EURASIP J. Adv. Signal Process. 2009 (2009) - [j18]Jonne Poikonen, Ari Paasio:
An 8times 8 Cell Analog Order-Statistic-Filter Array With Asynchronous Grayscale Morphology in 0.13-muhboxm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1541-1553 (2009) - [j17]Mika Laiho, Víctor M. Brea, Ari Paasio:
Effect of Mismatch on the Reliability of ON/OFF-Programmable CNNs. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(10): 2259-2269 (2009) - [c54]Jonne Poikonen, Mika Laiho, Ari Paasio:
Locally adaptive image sensing with the 64x64 cell MIPA4k mixed-mode image processor array. ECCTD 2009: 93-96 - [c53]Mika Laiho, Jonne Poikonen, Ari Paasio:
Space-dependent binary image processing within a 64x64 mixed-mode array processor. ECCTD 2009: 189-192 - [c52]Joona Marku, Jonne Poikonen, Ari Paasio:
Temperature Compensation in Combination Selection based Mismatch Calibration. ISCAS 2009: 1589-1592 - [c51]Jonne Poikonen, Mika Laiho, Ari Paasio:
MIPA4k: A 64×64 Cell Mixed-mode Image Processor Array. ISCAS 2009: 1927-1930 - [c50]Mika Laiho, Jonne Poikonen, Peter Virta, Ari Paasio:
Live Demonstration: MIPA4k: A 64×64 Cell Mixed-mode Image Processor Array. ISCAS 2009: 1931 - [c49]Olli Lahdenoja, Mika Laiho, Ari Paasio:
On the Spatial Distribution of Local Non-parametric Facial Shape Descriptors. SCIA 2009: 351-358 - [c48]Joona Marku, Jonne Poikonen, Ari Paasio:
Temperature behavior of combination selection based mismatch calibration with 65 nm CMOS technology. SoCC 2009: 311-314 - 2008
- [j16]Mika Laiho, Ari Paasio, Jacek Flak, Kari Halonen:
Template Design for Cellular Nonlinear Networks With 1-Bit Weights. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 904-913 (2008) - [j15]Janne Maunu, Mika Laiho, Ari Paasio:
A Differential Architecture for an Online Analog Viterbi Decoder. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(4): 1133-1140 (2008) - [c47]Janne Maunu, Mika Laiho, Tero Koivisto, Kati Virtanen, Mikko Pänkäälä, Ari Paasio:
Mixed-signal baseband processing chain for a MB-OFDM receiver. ICECS 2008: 470-473 - [c46]Mika Laiho, Jonne Poikonen, Ari Paasio, Kari Halonen:
Centroiding and classification of objects using a processor array with a scalable region of interest. ISCAS 2008: 1604-1607 - 2007
- [j14]Olli Lahdenoja, Mika Laiho, Janne Maunu, Ari Paasio:
A Massively Parallel Face Recognition System. EURASIP J. Embed. Syst. 2007 (2007) - [j13]Lauri Koskinen, Ari Paasio, Kari Halonen:
CNN-type algorithms for H.264 variable block-size partitioning. Signal Process. Image Commun. 22(9): 797-808 (2007) - [c45]Víctor M. Brea, Mika Laiho, Natalia A. Fernandez-Garcia, Ari Paasio, Diego Cabello:
Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing models. ECCTD 2007: 92-95 - [c44]Lauri Koskinen, Joona Marku, Ari Paasio, Kari Halonen:
Architecture for Analog Variable Block-Size Motion Estimation. ICIP (2) 2007: 493-496 - [c43]Kati Virtanen, Janne Maunu, Jonne Poikonen, Ari Paasio:
A 12-bit Current-Steering DAC with Calibration by Combination Selection. ISCAS 2007: 1469-1472 - 2006
- [j12]Víctor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello:
A binary-based on-chip CNN solution for pixel-level snakes. Int. J. Circuit Theory Appl. 34(4): 383-407 (2006) - [j11]Jacek Flak, Mika Laiho, Ari Paasio, Kari Halonen:
Dense CMOS implementation of a binary-programmable cellular neural network. Int. J. Circuit Theory Appl. 34(4): 429-443 (2006) - [j10]Mikko Pänkäälä, Kati Virtanen, Ari Paasio:
An Analog 2-D DCT Processor. IEEE Trans. Circuits Syst. Video Technol. 16(10): 1209-1216 (2006) - [c42]Olli Lahdenoja, Esa Alhoniemi, Mika Laiho, Ari Paasio:
A Shape-Preserving Non-parametric Symmetry Transform. ICPR (2) 2006: 373-377 - [c41]Tero Koivisto, Teemu Peltonen, Meigen Shen, Esa Tjukanoff, Ari Paasio:
Sine wave as a correlating signal for UWB radio. ISCAS 2006 - [c40]Olli Lahdenoja, Janne Maunu, Mika Laiho, Ari Paasio:
A massively parallel algorithm for local binary pattern based face recognition. ISCAS 2006 - [c39]Mika Laiho, Ari Paasio, Víctor M. Brea:
Effect of mismatch on the reliability of binary-programmable CNNs. ISCAS 2006 - [c38]Janne Maunu, Mikko Pänkäälä, Joona Marku, Jonne Poikonen, Mika Laiho, Ari Paasio:
Current source calibration by combination selection of minimum sized devices. ISCAS 2006 - [c37]Jonne Poikonen, Ari Paasio:
On the topographic equivalence between voltage mode and current mode ranked order filters for array processors. ISCAS 2006 - [c36]Kati Virtanen, Mikko Pänkäälä, Mika Laiho, Ari Paasio:
Implementation of an asynchronous current-mode ADC with adaptive quantization. ISCAS 2006 - [c35]Janne Maunu, Joona Marku, Mika Laiho, Ari Paasio:
An On-Chip Measurement Circuit for Calibration by Combination Selection. SoCC 2006: 63-64 - 2005
- [j9]Lauri Koskinen, Ari Paasio, Kari Halonen:
Motion estimation computational complexity reduction with CNN shape segmentation. IEEE Trans. Circuits Syst. Video Technol. 15(6): 771-777 (2005) - [c34]Víctor M. Brea, Mika Laiho, Ari Paasio:
Robustness improvement in binary cellular non-linear network architectures. ECCTD 2005: 149-152 - [c33]Asko Kananen, Ari Paasio, Kari Halonen:
A simple variable λ resistive network implementation. ECCTD 2005: 153-156 - [c32]Olli Lahdenoja, Mika Laiho, Ari Paasio:
Reducing the feature vector length in local binary pattern based face recognition. ICIP (2) 2005: 914-917 - [c31]Jonne Poikonen, Ari Paasio:
Rank identification for an analog ranked order filter. ISCAS (3) 2005: 2819-2822 - [c30]Kati Virtanen, Mikko Pänkäälä, Ari Paasio:
A current-mode ADC with adaptive quantization. ISCAS (4) 2005: 3115-3118 - [c29]Víctor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello:
A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing. ISCAS (4) 2005: 3922-3925 - [c28]Laura Vesalainen, Jonne Poikonen, Ari Paasio:
A Gray-coded digital-to-analog converter for a mixed-mode processor array. ISCAS (4) 2005: 3930-3933 - [c27]Mika Laiho, Ari Paasio, Jacek Flak, Kari Halonen:
Template design for binary-programmable cellular nonlinear networks. ISCAS (4) 2005: 3938-3941 - [c26]Olli Lahdenoja, Jonne Poikonen, Ari Paasio:
Effect of mismatch on a ranked-order extractor array [image processing applications]. ISCAS (4) 2005: 4118-4121 - [c25]Lauri Koskinen, Kari Halonen, Ari Paasio:
Parallel processor algorithm for variable block-size computation at low bitrates [video coding applications]. ISCAS (4) 2005: 4122-4125 - [c24]Víctor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello:
A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes. ISCAS (6) 2005: 5798-5801 - [c23]Mika Laiho, Ari Paasio:
Dynamically coupled multi-layer mixed-mode CNN. ISCAS (6) 2005: 5810-5813 - [c22]Kati Virtanen, N. Pankaala, Ari Paasio:
Compensation of errors generated by an analog 2D DCT. ISCAS (6) 2005: 6272-6275 - 2004
- [j8]Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen:
A mixed-mode polynomial cellular array processor hardware realization. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(2): 286-297 (2004) - [j7]Jonne Poikonen, Ari Paasio:
A ranked order filter implementation for parallel analog processing. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(5): 974-987 (2004) - [j6]Víctor M. Brea, David López Vilariño, Ari Paasio, Diego Cabello:
Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(5): 997-1013 (2004) - [c21]Ari Paasio, Jacek Flak, Mika Laiho, Kari Halonen:
High density VLSI implementation of a bipolar CNN with reduced programmability. ISCAS (3) 2004: 21-24 - [c20]Laura Vesalainen, Jonne Poikonen, Mikko Pänkäälä, Ari Paasio:
A gray-code current-mode ADC for mixed-mode cellular computer. ISCAS (3) 2004: 81-84 - [c19]Mika Laiho, Ari Paasio, Kari Halonen:
Improved cell core for a mixed-mode polynomial CNN. ISCAS (3) 2004: 93-96 - [c18]Asko Kananen, Mika Laiho, Kari Halonen, Ari Paasio:
N × 16 cellular test chips for low-pass filtering large images. ISCAS (5) 2004: 461-464 - [c17]Lauri Koskinen, Ari Paasio, Kari Halonen:
3-neighborhood motion estimation in CNN silicon architectures. ISCAS (5) 2004: 708-711 - [c16]Mikko Pänkäälä, Jonne Poikonen, Laura Vesalainen, Ari Paasio:
Realization of an analog current-mode 2D DCT. ISCAS (1) 2004: 745-748 - 2003
- [j5]Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen:
Realization of Couplings in a Polynomial Type Mixed-Mode Cellular Neural Network. Int. J. Neural Syst. 13(6): 443-452 (2003) - [c15]Mika Laiho, Asko Kananen, Ari Paasio, Kari Halonen:
High speed cellular array computer realizations for low power applications. IJCNN 2003: 1502-1505 - [c14]Ari Paasio, Mika Laiho, Asko Kananen, Kari Halonen, Jonne Poikonen:
A 32×32 cellular test chip targeting new functionalities. ISCAS (3) 2003: 506-509 - [c13]Jonne Poikonen, Ari Paasio:
An area-efficient full-wave current rectifier for analog array processing. ISCAS (5) 2003: 757-760 - [c12]Lauri Koskinen, Ari Paasio, Kari Halonen:
CNN shape segmentation advantages in MPEG-4 simple profile encoding. ISSPA (2) 2003: 117-120 - 2002
- [j4]Asko Kananen, Ari Paasio, Mika Laiho, Kari Halonen:
CNN applications from the hardware point of view: video sequence segmentation. Int. J. Circuit Theory Appl. 30(2-3): 117-137 (2002) - [j3]Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen:
A mixed-mode polynomial-type CNN for analysing brain electrical activity in epilepsy. Int. J. Circuit Theory Appl. 30(2-3): 165-180 (2002) - [c11]Víctor M. Brea, David López Vilariño, Ari Paasio, Diego Cabello:
Implementation oriented theory design issues on the DTCNN template generation. ISCAS (3) 2002: 101-104 - [c10]Lauri Koskinen, Ari Paasio, Mika Laiho, Kari Halonen:
Effect of CNN shape segmentation on MPEG-4 shape bit-rate. ISCAS (4) 2002: 552-555 - [c9]Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen:
Cell and network level design of a mixed-mode CNN. ISCAS (1) 2002: 621-624 - 2001
- [c8]Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen:
Discrete time analog polynomial type CNN with digital state. ISCAS (3) 2001: 497-500 - 2000
- [c7]Mika Laiho, Ari Paasio, Kari Halonen:
Building blocks for large annealed compact neural networks. ISCAS 2000: 415-418 - [c6]Ari Paasio, Jani Paakkulainen, Jouni Isoaho:
A multiplier-free fixed-task digital CNN array for video segmentation system. ISCAS 2000: 710-713
1990 – 1999
- 1999
- [j2]Ari Paasio, Adam Dawidziuk:
CNN template robustness with different output nonlinearities. Int. J. Circuit Theory Appl. 27(1): 87-102 (1999) - [j1]Ari Paasio, Asko Kananen, Kari Halonen, Veikko Porra:
A QCIF Resolution Binary I/O CNN-UM Chip. J. VLSI Signal Process. 23(2-3): 281-290 (1999) - [c5]Ari Paasio, Asko Kananen, Kari Halonen:
Very fast and compact fixed template CNN realizations for B/W processing. ISCAS (5) 1999: 595-598 - 1998
- [c4]Ari Paasio, Asko Kananen, Kari Halonen, Veikko Porra:
A 48 by 48 CNN chip operating with B/W images. ICECS 1998: 191-194 - 1996
- [c3]Ari Paasio, Adam Dawidziuk, Veikko Porra:
VLSI implementation of cellular neural network universal machine. ICECS 1996: 414-416 - [c2]Ari Paasio, Adam Dawidziuk, Veikko Porra:
Implementation of cellular neural network operating with bipolar images. ICNN 1996: 898-901 - 1994
- [c1]Ari Paasio, Kari Halonen, Veikko Porra:
CMOS Implementation of Associative Memory Using Cellular Neural Network Having Adjustable Template Coefficients. ISCAS 1994: 487-490
Coauthor Index
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