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ORCID13th FMCAD 2013: Portland, OR, USA
- Formal Methods in Computer-Aided Design, FMCAD 2013, Portland, OR, USA, October 20-23, 2013. IEEE 2013
- Barbara Jobstmann, Sandip Ray:
Preface.
Tutorials
- Rajeev Alur, Rastislav Bodík, Garvit Juniwal, Milo M. K. Martin, Mukund Raghothaman, Sanjit A. Seshia, Rishabh Singh, Armando Solar-Lezama
, Emina Torlak, Abhishek Udupa:
Syntax-guided synthesis. 1-8 - Nate Foster, Arjun Guha, Mark Reitblatt, Cole Schlesinger:
Tutorial: Practical verification of network programs. 9-10 - Jim Grundy:
Firmware validation: challenges and opportunities. 11 - Somesh Jha, Thomas W. Reps, William R. Harris:
Secure programs via game-based synthesis. 12-13
Keynotes and Special Events
- Lori A. Clarke:
Using process modeling and analysis techniques to reduce errors in healthcare. 14 - Pranav Ashar:
Static verification based signoff - A key enabler for managing verification complexity in the modern soc. 15 - Thomas Wahl:
The FMCAD graduate student forum. 16-17
Session 1: Synthesis
- Krishnendu Chatterjee, Thomas A. Henzinger, Jan Otop, Andreas Pavlogiannis:
Distributed synthesis for LTL fragments. 18-25 - Rajeev Alur, Salar Moarref, Ufuk Topcu:
Counter-strategy guided refinement of GR(1) temporal logic specifications. 26-33 - Saqib Sohail, Fabio Somenzi:
Efficient handling of obligation constraints in synthesis from omega-regular specifications. 34-41 - Yifei Yuan, Anduo Wang, Rajeev Alur, Boon Thau Loo:
On the feasibility of automation for bandwidth allocation problems in data centers. 42-45
Session 2: Decision Procedure Enhancements
- David Déharbe, Pascal Fontaine, Daniel Le Berre, Bertrand Mazure:
Computing prime implicants. 46-52 - Koen Claessen, Niklas Eén, Baruch Sterin:
A circuit approach to LTL model checking. 53-60 - Sylvain Conchon, Amit Goel, Sava Krstic, Alain Mebsout, Fatiha Zaïdi:
Invariants for finite instances and beyond. 61-68
Session 3: Interpolation, Quantifier Elimination, Synthesis
- Philipp Rümmer, Pavle Subotic:
Exploring interpolants. 69-76 - Georg Hofferek, Ashutosh Gupta, Bettina Könighofer, Jie-Hong Roland Jiang, Roderick Bloem:
Synthesizing multiple boolean functions using interpolation on a single proof. 77-84 - Eugene Goldberg, Panagiotis Manolios:
Quantifier elimination via clause redundancy. 85-92 - Viktor Kuncak, Régis Blanc:
Interpolation for synthesis on unbounded domains. 93-96
Session 4: Verification of Digital, Hybrid, and Analog Systems
- John W. O'Leary, Roope Kaivola, Tom Melham:
Relational STE and theorem proving for formal verification of industrial circuit designs. 97-104 - Sicun Gao, Soonho Kong, Edmund M. Clarke:
Satisfiability modulo ODEs. 105-112 - Jijie Wei, Yan Peng, Ge Yu, Mark R. Greenstreet:
Verifying global convergence for a digital phase-locked loop. 113-120
Session 5: Embedded Software Verification
- Alex Horn, Michael Tautschnig, Celina G. Val, Lihao Liang, Tom Melham, Jim Grundy, Daniel Kroening:
Formal co-validation of low-level hardware/software interfaces. 121-128 - Hassan Eldib, Chao Wang:
An SMT based method for optimizing arithmetic computations in embedded software code. 129-136 - Sagar Chaki, Arie Gurfinkel, Ofer Strichman:
Verifying periodic programs with priority inheritance locks. 137-144 - Divjyot Sethi, Srinivas Narayana, Sharad Malik:
Abstractions for model checking SDN controllers. 145-148
Session 6: IC3 and Debugging
- Sam Bayless, Celina G. Val, Thomas Ball, Holger H. Hoos, Alan J. Hu:
Efficient modular SAT solving for IC3. 149-156 - Zyad Hassan, Aaron R. Bradley, Fabio Somenzi:
Better generalization in IC3. 157-164 - Alessandro Cimatti, Alberto Griggio, Sergio Mover, Stefano Tonetta:
Parameter synthesis with IC3. 165-168 - Gadi Aleksandrowicz, Jason Baumgartner, Alexander Ivrii, Ziv Nevo:
Generalized counterexamples to liveness properties. 169-180
Session 7: SAT/SMT
- Marijn Heule, Warren A. Hunt Jr., Nathan Wetzler:
Trimming while checking clausal proofs. 181-188 - Tim King, Clark W. Barrett, Bruno Dutertre:
Simplex with sum of infeasibilities for SMT. 189-196 - Alexander Nadel, Vadim Ryvchin, Ofer Strichman:
Efficient MUS extraction with resolution. 197-200
Session 8: Software Verification
- Annu John, Igor Konnov, Ulrich Schmid, Helmut Veith, Josef Widder:
Parameterized model checking of fault-tolerant distributed algorithms by abstraction. 201-209 - Björn Wachter, Daniel Kroening, Joël Ouaknine:
Verifying multi-threaded software with impact. 210-217 - Daniel Larraz, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio:
Proving termination of imperative programs using Max-SMT. 218-225 - Yulia Demyanova, Helmut Veith, Florian Zuleger:
On the concept of variable roles and its use in software analysis. 226-230
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